== Getting started with RFNoC X310 == [[TOC(Tutorials/k0SDR*)]] === Description === This tutorial is a guide for getting started with RFNoC using an USRP X310 on ORBIT grid. Before starting to experiment with RFNoC, here are a couple of useful presentations, write ups from Ettus Research, that one should go through. https://github.com/EttusResearch/uhd/wiki/RFNoC:-Getting-Started http://static1.squarespace.com/static/543ae9afe4b0c3b808d72acd/t/55ddc6d6e4b09069ee81e20c/1440597718379/3.+braun_pendlum--rfnoc+2015-08-26.pdf https://kb.ettus.com/Getting_Started_with_RFNoC_Development === Set up === * Make a reservation on the [https://www.orbit-lab.org/schedule/ Orbit Scheduler] for using the grid. * Load baseline-rfnoc-labtools.ndz on an ORBIT node. {{{ omf load -i baseline-rfnoc-labtools.ndz -t node18-1 }}} * Once imaging is done, turn the node on {{{ omf tell -a on -t node18-1 }}} * Wait for the node to turn on and log in {{{ ssh root@node18-1 }}} === Find USRP X310s === ORBIT grid has 8 USRP X310s in a MIMO rack ((23,1) ... (23,8)) and 4 nodes with locally connected USRP X310s ((18,1),(18,20),(3,1),(3,20)). Of these 4 nodes, (18,20) and (3,1) have a PCI express link to their local X310, where as the other 2 have 10G Ethernet links. * Finding X310s in the MIMO rack X310s in the MIMO rack can be accessed from any node in the grid. Their IP addresses go from 10.10.23.1 to 10.10.23.8. X310 (23,1) is accessed from node (18,1) as shown below. Since the image used has UHD rfnoc-devel branch installation, the UHD version is shown as UHD_4.0.0.rfnoc-devel-211-g2cf80a69. {{{ root@node18-1:~# uhd_find_devices --args="addr=10.10.23.1" linux; GNU C++ version 4.8.4; Boost_105400; UHD_4.0.0.rfnoc-devel-211-g2cf80a69 -------------------------------------------------- -- UHD Device 0 -------------------------------------------------- Device Address: serial: 30A3570 addr: 10.10.23.1 fpga: HG name: Mercury product: X310 type: x300 }}} * Finding local X310 (10G Ethernet) Nodes (18,1) and (3,20) have 10G Ethernet links to their local X310s. To access these X310s, please make sure the interface eth0 is configured as below. {{{ root@node18-1:~# ifconfig eth0 192.168.10.1 netmask 255.255.255.0 mtu 9000 }}} Now, running uhd_find_devices with IP address 192.168.10.2 gives the following {{{ root@node18-1:~# uhd_find_devices --args="addr=192.168.10.2" linux; GNU C++ version 4.8.4; Boost_105400; UHD_4.0.0.rfnoc-devel-211-g2cf80a69 -------------------------------------------------- -- UHD Device 0 -------------------------------------------------- Device Address: serial: F4E34F addr: 192.168.10.2 fpga: HG name: product: X310 type: x300 }}} If you do not specify an IP address in the args option, the node tries to access the X310s in the MIMO rack also. {{{ root@node18-1:~# uhd_find_devices linux; GNU C++ version 4.8.4; Boost_105400; UHD_4.0.0.rfnoc-devel-211-g2cf80a69 -------------------------------------------------- -- UHD Device 0 -------------------------------------------------- Device Address: serial: 30A3570 addr: 10.10.23.1 fpga: HG name: Mercury product: X310 type: x300 -------------------------------------------------- -- UHD Device 1 -------------------------------------------------- Device Address: serial: F4E34F addr: 192.168.10.2 fpga: HG name: product: X310 type: x300 }}} * Finding local X310 (PCI express) Nodes (18,20) and (3,1) have PCI express links to their local X310s. To access these X310s, run the following [https://files.ettus.com/manual/page_ni_rio_kernel.html] {{{ root@node3-1:~# /usr/local/bin/niusrprio_pcie start Loading: NiRioSrv niusrpriok Starting: niusrpriorpc }}} Now, running uhd_find_devices with resource RIO0 gives the following {{{ root@node3-1:~# uhd_find_devices --args="resource=RIO0" linux; GNU C++ version 4.8.4; Boost_105400; UHD_4.0.0.rfnoc-devel-211-g2cf80a69 -------------------------------------------------- -- UHD Device 0 -------------------------------------------------- Device Address: serial: F4FCFF fpga: HG name: product: X310 resource: RIO0 type: x300 }}} {{{#!comment * Run uhd_usrp_probe. This might throw an error as shown below, as the X310 might contain a firmware build that is not compatible with the RFNoC UHD installation. {{{ root@node18-20:~# uhd_usrp_probe --args="addr=192.168.10.2" linux; GNU C++ version 4.8.2; Boost_105400; UHD_003.010.rfnoc-285-gb9765c42 -- X300 initialization sequence... -- Determining maximum frame size... 8000 bytes. -- Setup basic communication... ========================================================= Warning: Expected FPGA compatibility number 1000, but got 9: The FPGA image on your device is not compatible with this host code build. Download the appropriate FPGA images for this version of UHD. Please run: "/usr/local/lib/uhd/utils/uhd_images_downloader.py" Then burn a new image to the on-board flash storage of your USRP X3xx device using the image loader utility. Use this command: "/usr/local/bin/uhd_image_loader" --args="type=x300,addr=192.168.10.2" For more information, refer to the UHD manual: http://files.ettus.com/manual/page_usrp_x3x0.html#x3x0_flash========================================================= Error: RuntimeError: Expected firmware compatibility number 4.0, but got 3.0: The firmware build is not compatible with the host code build. Please run: "/usr/local/lib/uhd/utils/uhd_images_downloader.py" }}} * In case of the above error, you can burn the appropriate FPGA image using uhd_image_loader as shown above, or using usrp_x3xx_fpga_jtag_programmer.sh found in uhd/tools.When the jtag programmer is used, the FPGA image is lost on power cycling. {{{ root@node18-20:~/uhd/tools# ./usrp_x3xx_fpga_jtag_programmer.sh --fpga-path="/usr/local/share/uhd/images/usrp_x310_fpga_HGS.bit" ======================================= Copyright 2014 Ettus Research LLC JTAG Programming Tool ======================================= ==== Generating impact batch file 1eRfmtCb.impact.cmd... ==== Running impact -- loading /usr/local/share/uhd/images/usrp_x310_fpga_HGS.bit into the FPGA... }}} * Now running uhd_usrp_probe should print out a lot of messages with this at the end : the list of RFNoC blocks in the current FPGA image. {{{ -- ========== Full list of RFNoC blocks: ============ -- * 0/Radio_0 -- * 0/Radio_1 -- * 0/AddSub_0 -- * 0/FIR_0 -- * 0/FFT_0 -- * 0/Window_0 -- * 0/NullSrcSink_0 -- * 0/LogPwr_0 -- * 0/MovingAverage_0 -- * 0/VectorIIR_0 -- * 0/KeepOneInN_0 -- * 0/fosphor_0 -- * 0/FIFO_0 }}} }}}